The present invention relates to imaging apparatus having a video memory function, and more particularly, to imaging apparatus having a video memory function wherein a CCD storage sensitivity enhancement function and an electronic enlargement function are combined.
In conventional video signal processing apparatus, a part or all of a screen image is stored in memory and features including noise reduction and special effects are realized by controlling signals in the memory. Video signal processing apparatus which uses memory is devised so that various features are realized with relatively small amount of memory in order to support requests for compact size, low power consumption, and low cost. To realize a plurality of features with small amount of memory, there is proposed a method used for example in imaging apparatus having a video memory function such as that disclosed in JP-A-8-307760.
Conventional imaging apparatus is described below with reference to FIG. 12. In FIG. 12, a signal input to a video input 101 is written via a write port of a field memory 102 via control of a write control circuit 103. The signal written to the field memory 102 is delayed by a single field, read from a first read port of the field memory 102 via control of a first read control circuit 104, and read from a second read port of the field memory via control of a second read control circuit 105. The first read control circuit 104 performs control to read a signal in an area from an address given by a read start relative address 107 to an address given by a read end relative address 108. The signal read from the first port of the field memory 102 is output from a video output 106 and electronically enlarged by an interpolation circuit (not shown). A second read control circuit 105 reads the signal in the entire signal write area. A signal read from the second port of the field memory 102 is used as a noise reduction signal 109 by a cyclic noise reduction circuit (not shown). The write control circuit 103 performs control to start writing from the address next to the address given by a read end relative address 108. By using the field memory 102 in the form of a ring, a write address does not pass by a first read address. The above operation is synchronized by a synchronization signal 110.
In this way, a plurality of features such as the electronic enlargement feature and cyclic noise reduction feature can be realized simultaneously by controlling a field memory in the form of a ring via use of a three-port field memory having one write port and two read ports.
In conventional video signal processing apparatus stated above, however, a combination of the CCD storage sensitivity enhancement feature, the cyclic noise reduction feature and the electronic enlargement feature presents a problem: a write address passes by a read address and an image is read with the order of write times inverted. This prevents a normal video signal from being obtained. Such an image is acceptable as a still picture but unacceptable as an animated image.
The invention solves such a problem. The invention aims at reading a normal video signal by prevention a write address from passing by a read address even in a case where a combination of the CCD storage sensitivity enhancement feature, the cyclic noise reduction feature and the electronic enlargement feature is used, by using a three-port field memory having one write port and two read ports.
In order to solve such a problem, according to the invention, imaging apparatus having a video memory function comprises: a video memory having a plurality of read ports and a capacity of storing images in two fields or more, wherein CCD storage sensitivity enhancement means is connected to a write port; a write control circuit for storing a single-field image in each memory area provided by dividing the storage space of the video memory into a plurality of sub-spaces; a plurality of read control sections for reading a single-field image stored in each memory area; and memory control means for reading an image from the video memory by a delay amount corresponding to the timing of a synchronization signal from the CCD storage sensitivity enhancement means. This configuration allows adjustment of the delay amount and prevents an image write address from passing by an image read address so that image data given CCD storage sensitivity enhancement is processed normally.
Also provided is electronic enlargement means connected to the read ports. This configuration prevents an image write address from passing by an image read address thus enabling a normal electronic enlargement processing.
Also provided is vertical inversion read means connected to the read ports. This configuration prevents an image write address from passing by an image read address thus enabling a normal vertical inversion processing.
Also provided is noise reduction means connected to the read ports. This configuration prevents an image write address from passing by an image read address thus enabling a normal noise reduction processing.
Also provided are means for automatically determining an input image field based on a horizontal synchronization signal and a vertical synchronization signal and means for setting a memory area where image data is to be written depending on a sensitivity enhancement control signal from a CPU. This configuration allows an image given CCD storage sensitivity enhancement to be written to a memory area where the order of write times is observed.
Also provided is a circuit for generating a vertical color order identification signal corresponding to a read field and a read address according to an electronic enlargement control signal and a CCD storage sensitivity enhancement mode control signal, wherein the vertical color order identification signal can be reset to an initial value for each field via the CPU. This configuration allows generation of a proper vertical color order identification signal and proper enlargement of an image given CCD storage sensitivity enhancement.
The first aspect of the invention is imaging apparatus having a video memory function comprising: a video memory having a plurality of read ports and a capacity of storing images in two fields or more, wherein CCD storage sensitivity enhancement means is connected to a write port; a write control circuit for storing a single-field image in each memory area provided by dividing the storage space of the image memory into a plurality of sub-spaces; a plurality of read control sections for reading a single-field image stored in each memory area; and memory control means for reading an image from the image memory by a delay amount corresponding to the timing of a synchronization signal from the CCD storage sensitivity enhancement means. This aspect has an effect of reading images given CCD sensitivity enhancement in proper time order.
The second aspect of the invention is imaging apparatus according to the first aspect of the invention, equipped with electronic enlargement means connected to the read ports. This aspect has an effect of performing enlargement without disturbing the time order.
The third aspect of the invention is imaging apparatus according to the first aspect of the invention, equipped with vertical inversion read means connected to the read ports. This aspect has an effect of performing vertical inversion without disturbing the time order.
The fourth aspect of the invention is imaging apparatus according to the first aspect of the invention, equipped with noise reduction means connected to the read ports. This aspect has an effect of performing noise reduction without disturbing the time order.
The fifth aspect of the invention is imaging apparatus according to any one of the first aspect through the fourth aspect, equipped with means for automatically determining an input image field based on a horizontal synchronization signal and a vertical synchronization signal and means for setting a memory area where image data is to be written depending on a sensitivity enhancement control signal from a CPU. This aspect has an effect of obtaining and setting a proper memory area where image data is to be written from a horizontal synchronization signal and a vertical synchronization signal.
The sixth aspect of the invention is imaging apparatus according to the fifth aspect, equipped with a circuit for generating a vertical color order identification signal corresponding to a read field and a read address according to an electronic enlargement control signal and a CCD storage sensitivity enhancement mode control signal, wherein the vertical color order identification signal can be reset to an initial value for each field via the CPU. This aspect has an effect of generating a proper vertical color order identification signal.